1. Field of the Invention
The present invention relates to a random access memory (RAM), and more particularly, to a device and a method for controlling a synchronous RAM which operates in synchronization with a system clock signal.
2. Description of the Related Art
A synchronous dynamic RAM (SDRAM) can store a large amount of data in a relatively small circuit area and operates in synchronization with a system clock signal used in a central processing unit (CPU) of a computer, as disclosed in U.S. Pat. No. 5,390,149"System Including a Data Processor, a Synchronous DRAM, a Peripheral Device, and a System Clock". The SRAM accesses data using the system clock signal, thus markedly reducing data access time as compared to a conventional general DRAM.
SDRAM operation under various conditions has not been standardized due to the recent emergence of the SDRAM. For example, if a burst length is a full page, data in the SDRAM can be accessed by two methods: the termination method and the wrap-around method. The termination method is the method used to access data when the burst length is 1, 2, 4, or 8. In the termination method, an output port of a synchronous RAM is terminated in a high impedance state after a full page of data has been accessed, when the burst length is a full page.
On the other hand, in the wrap-around method, after a full page of data has been accessed, data corresponding to an initial address of the page is accessed again. Here, the initial address is a column address externally input upon application of a data input/output command.
Most SDRAM manufacturing companies selectively use both methods. For example, synchronous graphics memory is a kind of SDRAM which usually employs the wrap-around method.
Therefore, a conventional SDRAM controlling device for controlling access to data in an SDRAM cannot support both methods because its hardware structure must be dedicated to only one of the methods. That is, the conventional SDRAM controlling device has the disadvantage that it cannot support both data access methods.